1. Field of Disclosure
The present invention relates to a manufacturing method of a thin film transistor array panel.
2. Description of the Related Art
A display device may use a flat panel display, and as the flat panel display, various display devices such as a liquid crystal display, an organic light emitting diode display, a plasma display device, an electrophoretic display device, and an electrowetting display device may be used.
A representative liquid crystal display among them, which is one of the most common types of flat panel displays currently in use, includes two display panels with field generating electrodes such as a pixel electrode and a common electrode, and a liquid crystal layer interposed therebetween, and includes a backlight unit which provides light onto the display panels sandwiched with the liquid crystal layer therebetween. The liquid crystal display generates an electric field in the liquid crystal layer by applying a voltage to the field generating electrodes, determines directions of liquid crystal molecules of the liquid crystal layer by the generated electric field, and controls an emission amount of light provided by the backlight unit, thereby displaying images.
Generally, a plurality of gate lines which are parallel to each other, and a plurality of source lines which insulatively cross the gate lines are formed on the display panel, and pixels are formed for each region surrounded by the gate lines and the data lines. In each pixel, a pixel electrode and a switching element (thin film transistor) applying a pixel voltage to the pixel electrode are disposed.
The thin film transistor array panel includes a gate electrode which is a part of the gate line, a semiconductor layer forming a channel, and a source electrode and a drain electrode which are a part of the data line. The thin film transistor is a switching element that transfers or blocks an image signal transferred through the data line to the pixel electrode according to a scanning signal transferred through the gate line.
Meanwhile, the gate lines, the data lines, and the switching element are formed by a photolithography process using an exposure mask.
Since the exposure mask forms a large part in manufacturing cost, recently, a four-sheet mask process and a five-sheet mask process have been developed in order to reduce the manufacturing cost and the manufacturing process.
For example, in the four-sheet mask process, a source metal pattern including a source line is formed by sequentially coating a semiconductor layer, an ohmic contact layer, and a metal layer on a base substrate where a gate metal pattern including the gate line is formed and patterning the metal layer by a photolithography process. Subsequently, in the source metal pattern, a channel layer which is patterned to be the same as the source metal pattern, is formed by dry-etching the ohmic contact layer and the semiconductor layer by an etching mask. Generally, in the dry-etch process for forming the channel layer, HCl or SF6 gas is used as etching gas.
Meanwhile, in the dry-etch process, since the source metal pattern is exposed to dry-etching gas, the etching gas reacts with the metal material forming the source metal pattern to form reaction by-products. There is a problem in that the reaction by-products formed above remain around the source metal pattern to cause a wiring defect. Particularly, when the source metal pattern includes copper (Cu) having weak chemical resistance, there is a problem in that the above-mentioned reaction by-products are significantly increased.
The above information disclosed in this Background section is only for enhancement of understanding of the background of the invention and therefore it may contain information that does not form the prior art that is already known in this country to a person of ordinary skill in the art.